Recently, a demand for high-resistance substrate is increased along with the widespread use of a high-frequency communication device used in a short-distance wireless LAN. Conventionally, a compound semiconductor such as GaAs has been mainly used for a support substrate of a RF (Radio Frequency high frequency) which requires high resistance. However, the compound semiconductor substrate is very expensive.
Meanwhile, a silicon CMOS requires a large amount of power, so that it has been considered that it is not suitable for the RF circuit. However, because of recent considerable miniaturization and development of designing, it can be applied to the RD circuit. Therefore, a high-resistance silicon wafer which is excellent in RF characteristics and excellent in economical efficiency such as a mirror-surface silicon wafer or a SOI (Silicon On Insulator) wafer using high-resistance crystal grown by the Czochralski method (hereinafter referred to as the CZ method) has attracted a lot of attention instead of the substrate of the compound semiconductor such as GaAs.
However, since a quartz crucible is used when a silicon single crystal is manufactured by the CZ method, oxygen is contained in the crystal in an oversaturated state. Since a thermal donor is formed by this oxygen in a heat treatment in the process of forming the circuit of the device, there is a big problem such that resistivity of the wafer unstably varies on the side of a device maker.
FIG. 1 is a graph showing a relation between the thermal donor and the wafer resistivity. In a case of the normal low-resistance wafer to which a dopant is added, since the thermal donor slightly affects the resistivity of the wafer, there is no problem in a real operation. However, in a case of the high-resistance wafer in which the dopant is limited, when it is an n type, the resistivity is considerably reduced as the thermal donor is increased. When it is a p type, although the resistivity is considerably increased along with the increase of the thermal donor at first, if the thermal donor is kept increasing, the p type is converted to the n type, so that the resistivity is considerably decreased.
In order to solve the above problem such that the resistivity considerably varies along with the increase of the thermal donor, there is taken measures to prevent the thermal donor from being formed by using a low-oxygen silicon wafer which is manufactured using a special crucible in which oxygen is prevented from being fused by a MCZ method or an inner face SiC coating. However, the low-oxygen silicon wafer which needs to use the MCZ method or the special crucible is surely expensive as compared with the general-purpose silicon wafer having a relatively high oxygen concentration which is manufactured by the normal CZ method. In addition, oxygen lowering has a technical limitation. That is, in general, it is considered that concentration of 6×1017 atoms/cm3 is difficult and a degree of 8×1017 atoms/cm3 or less is a limit in a wafer of 300 mm. In addition, in the silicon wafer having a low oxygen concentration, there is a problem of slipping and the like because of the lowering of mechanical strength caused by reduction in oxygen concentration.
In order to solve the above problem, International Publication WO 00/55397 pamphlet discloses technique in which a silicon single crystal rod having resistivity of 100 Ωcm or more and initial interstitial oxygen concentration of 10 to 25 ppma [JEIDA] (7.9 to 19.8×1017 atoms/cm3 [Old-ASTM]) is grown, and a heat treatment for oxygen precipitation is performed on a silicon wafer cut from the above single crystal rod so as to limit the remaining interstitial oxygen concentration in the wafer to 8 ppma [JEIDA] (6.4×1017 atoms/cm3 [Old-ASTM]) or less.
According to this technique, the manufacturing cost of the initial wafer becomes low because the general-purpose silicon wafer having high initial oxygen concentration is used. Although the general-purpose silicon wafer having high initial oxygen concentration is used, since the oxygen precipitating heat treatment is performed on the silicon wafer, the remaining oxygen concentration is lowered. Therefore, an oxygen donor is effectively prevented from being generated in a heat treatment for forming a circuit which is performed on the side of a device maker. In the process of lowering the oxygen concentration in the wafer, a large amount of oxygen precipitate (BMD) is generated. Therefore, a gettering ability of the wafer is improved.
However, according to the technique disclosed in the above pamphlet, it is necessary to generate a large amount of oxygen precipitate (BMD) using a high-resistance primary substrate having high-oxygen concentration, and to sufficiently lower the remaining oxygen concentration of a product silicon wafer by generating the large amount of oxygen precipitate (BMD) However, this causes the following problems.
First, to lower the remaining oxygen concentration in the product silicon wafer causes the mechanical strength of the wafer to be lowered. This is clear from the fact that slip dislocation generated from a wafer supporting part in the heat treatment is fixed by oxygen and as a result, a slip length is lowered as the oxygen concentration is increased [M. Akatsuka et al., Jpn. J. Appl. Phys., 36 (1997) L1422]. Meanwhile, the oxygen precipitate (BMD) is a factor of affecting the strength. The influence of BMD to the strength is complicated. For example, when the heat and stress of one's own weight added to the wafer is not so large, the movement of the slip dislocation is prevented and the strength is improved (patent document 1), but when the heat and the stress of one's own weight is large, the BMD itself becomes a source of the slip dislocation, so that the strength is lowered and the wafer is probably warped (K. Sueoka et al., Jpn. J. Appl. Phys., 36 (1997) 7095). The heat and the stress of one's weight applied to the wafer in the real device process depend on a device structure or a thermal sequence, and it is expected to be increased in some cases.
The second problem is resistance variation along with hydrogen annealing or argon annealing for removing COP [Crystal Originated Particle: aggregation of holes and a void defect surrounded by (111) surface]. In general, when an oxidation heat treatment is performed on a CZ silicon wafer, a ring-shaped oxidation-induced stacking fault called OSF is generated at a part in the crystal diameter direction. It is known that the position where the ring is generated depends on a crystal pulling speed and properties are different between the outer side and the inner side of the ring.
FIG. 2 is a lateral sectional view showing a general distribution of crystal defects in the diameter direction, and FIG. 3 is a vertical sectional view showing positional variation of the crystal defect distribution when the crystal pulling speed is varied. According to the normally grown CZ silicon wafer, a no-defect region exists on the inner side of the ring-shaped OSF developing region and its inside becomes a CCP developing region. Meanwhile, an oxygen precipitation accelerating region and an oxygen precipitation suppressing region exist on the outer side of the ring-shaped OSF developing region and its outside is a dislocation cluster defect developing region. Since the COP and dislocation cluster defect are introduced in the crystal in the crystal growing process, they are called grown-in defect also. Thus, a region from the no-defect region on the inner side of the ring-shaped OSF developing region to the oxygen precipitation suppressing region on the inner side of the dislocation cluster defect developing region is a perfect no-defect region in which the COP or dislocation cluster does not exist.
Here, the ring-shaped OSF developing region shifts toward the center of the crystal as the pulling speed is lowered and finally it disappears in the center. At this time, the vertical sectional configuration of the OSF developing region becomes V shape or U shape which curves downward in the convex direction. Therefore, it is difficult to manufacture the crystal having perfectly no defect on the whole region in the diameter direction with high yield. Thus, in view of productivity also in the real operation, the growing conditions are selected such that the OSF developing region may be positioned at an periphery of the wafer outside of the device forming region in many cases. As a result, since there are many harmful COP on the whole surface of the wafer and on such wafer, it is normal to perform argon annealing or hydrogen annealing in order to eliminate the COP from the surface of the wafer which is used as a device region.
However, since the argon annealing and the hydrogen annealing are basically technique for performing heat treatments on the wafer at high temperature for a long time in a reducing atmosphere (argon has a reducing property at high temperature), the wafer could be contaminated with heavy metal impurities from a heat treatment furnace. When the high-resistance wafer is contaminated with heavy metal impurities, the resistivity of the wafer extremely varies even with a little contamination. Therefore, the argon annealing and the hydrogen annealing are not desirable.
In addition, according to the hydrogen annealing, the dopant on the surface of the wafer is diffused outward by hydrogen reduction, so that the resistivity on the wafer surface tends to be increased. As a result, it is difficult to manufacture a high-resistance wafer having a predetermined resistivity range, with high precision. Meanwhile, according to the argon annealing, since the reducing action is not so strong as in the hydrogen annealing, there is no problem such that the dopant on the wafer surface outwardly diffuses and the resistivity of the wafer surface becomes high. However, a natural oxidation film on the wafer surface is removed in the heat treatment and dopant impurities contained in the removed natural oxidation film are diffused in the wafer, so that the resistivity of the wafer surface tends to being lowered.
Thus, when the high-resistance wafer is manufactured, the argon annealing and the hydrogen annealing for eliminating the COP are undesirable technique.
It is an object of the present invention to provide a high-resistance silicon wafer in which a gettering ability is excellent, an oxygen thermal donor is prevented from being generated in a heat treatment for forming a circuit which is implemented on the side of a device maker and mechanical strength is high, and its manufacturing method.
It is another object of the present invention to provide a high-resistance silicon wafer in which a gettering ability is excellent, an oxygen thermal donor is prevented from being generated in a heat treatment for forming a circuit which is implemented on the side of a device maker and resistance variation caused by argon annealing or hydrogen annealing for eliminating COP can be avoided, and its manufacturing method.